This pulse generator circuit is very useful for testing and running things like counters, stepping relays, and so on. It gets rid of the need to set a switch to make the right number of pulses. By pressing the right switches S1 through S9, one can get from 1 to 9 clock pulses that go in the wrong direction. Pulse Generator Circuit Schmitt trigger NAND gate N1 of IC2, resistor R1, and capacitor C1 are wired together to make clock pulses. These pulses are sent out through NAND gate N3, which is controlled by decade counter CD4017 (IC1). At first, none of the switches from S1 to S9 are pressed, so the LED is on. As resistor R3 pulls up pins 5 and 6 of NAND gate N2, its output pin 4 goes low. This stops the NAND gate N3 from setting its output pin 10 to high, so there is no pulse.

The Q outputs of IC1 are usually low because it is a decade counter. When clock pulses are sent to it, each of its Q outputs goes high in turn, from Q0 to Q1 to Q2 to Q3 to Q4 and so on. If any of the switches S1 through S9, say S5 (for five pulses), is briefly pressed, pins 5 and 6 of the NAND gate N2 go low. This makes its output pin 4 high, which fully charges capacitor C2 through diode D. At the same time, the high output of N2 turns on NAND gate N3, and clock pulses come out of pin 10. This is the number of pulses our device needs to check itself. Circuit operation When the clock pulses are sent to IC1's clock-enable pin 13, counting begins. As soon as the output pin 1 (Q5) of IC1 goes high, the input pins 5 and 6 of NAND gate N2 will also go high through switch S5. This is because the high-frequency clock allowed five pulses per momentary press. This high input to N2 gives a low output at pin 4, which turns off NAND gate N3 and leaves no pulse for counter IC1 to move forward. Before the next use, the counter IC1 must be in the "standby" state, which means that the output of Q0 must be "high." To do this, a time-delay pulse generator with a NAND gate N4, a resistor R4, a diode D, a capacitor C2, and a differentiator circuit with C3 and R5 is used. When NAND gate N2's output pin 4 is low, it slowly empties capacitor C2 through resistor R4. When the voltage across capacitor C2 drops below the lower trip point, the output pin 11 of NAND gate N4 goes high, and a high-going, sharp pulse is made at the junction of capacitor C3 and resistor R5. This sharp pulse resets the counter IC1, and its Q0 output (pin 3) goes high. This is shown by the way LED lights up. Make sure the red LED is on before going on to the next step to get the next pulse. If you briefly press any of the switches, the LED will light up. If the switch is held down, the counter keeps counting and you can't tell how many pulses it has counted.