You will need a probe that can test the logic level or determine whether or not clock activity is present in order to perform fault diagnosis on any logic circuit. This circuit can be used to test CMOS and TTL logic circuits for logic states and also for the

existence of clock activity at any point in the logic circuit, ranging from a few hertz to more than 10 MHz. The circuit is shown here. Through the use of alligator clips, power for the probe circuit is drawn from the circuit that is being tested. A window detector is provided by an LM319 dual-comparator that is connected in the circuit. When switch S1 is in the TTL position, the non-inverting pin of comparator N1 is biased to approximately 2V, and when switch S1 is in the CMOS position, it is biased to 80 percent of Vcc. Only in the event that the logic input at the probe tip has a value that is greater than the biasing voltage will the output of N1 go low. As a consequence of this, the red LED will light up to signify a logic 1 condition at the probe tip. Comparatively, the inverting pin of comparator N2 is biased at roughly 0.8V (when switch S1 is in the TTL position), which is equivalent to 20% of Vcc (in CMOS position of switch S1). It is only when the input voltage at the probe tip is lower than the biasing voltage that the output of the device will drop low and cause the green LED to light up, indicating that the logic state is 0. To enable the transmission of AC and clock signals, the probe tip is additionally linked, through capacitor C1, to the input of the CD4049 (N3). It merely performs the function of a buffer and links only the high-to-low going signals that are present at the input and output of the gate to the input of the subsequent gate N4.

Additionally, the output of gate N4 is coupled to gate N5, which is configured to operate as a monostable. A positive feedback from the output of gate N5 to the input of gate N4 ensures that future clock pulses at the input of N4 will have no effect unless the capacitor C4 (with a value of 0.47 microfarads) empties sufficiently through the use of a resistor with a value of 4.7 megaohms. A brief duration of illumination will be provided by a yellow LED that is driven by Gate N6. This LED serves the purpose of indicating the presence of oscillatory input at the probe tip. The output of gate N6 is then utilized in a subsequent step to either disable or activate the oscillator that is formed by gates N7 and N8. It causes the buzzer to beep momentarily during the mono period to indicate that oscillatory input is being received at the probe tip. As a result, we have an audio-visual indicator available at the probe tip during the clock or oscillatory input.